1. Field of the Invention
The present invention relates to the field of semiconductor packaging, and, more particularly, to semiconductor packaging employing through silicon via (TSV) technology.
2. Description of the Related Art
In recent years, use of through silicon via (TSV) has become an increasingly popular technique in the field of 3-D semiconductor packaging. In TSV, chips can be stacked on top of one another, and connected using conductive vias which are vertical pathways of interconnects that run through the chips.
Conventionally, a silicon substrate will include a plurality of through holes in which the conductive vias are formed. Attached to each of the conductive vias is a metal pad. From a top view, the metal pads are circular and wider than that of the conductive vias. However, the width of the metal pads limits how close the conductive vias can be to one another.